The Resource Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking
Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking
Resource Information
The item Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in University of Missouri Libraries.This item is available to borrow from 1 library branch.
Resource Information
The item Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in University of Missouri Libraries.
This item is available to borrow from 1 library branch.
- Summary
- This book constitutes the refereed proceedings of the IFIP WG10.5 Advanced Research Working Conference on Correct Hardware Design Methodologies, CHARME '95, held in Frankfurt, Germany, in October 1995. The 20 revised full papers presented were carefully selected by the program committee and address all current aspects of research and advanced applications in the field of formal verification of hardware. Among the topics covered are model checking, theorem proving, formally verified synthesis, process algebras, finite state systems, verification environments, language containment, and VHDL
- Language
- eng
- Extent
- 1 online resource
- Contents
-
- What if model checking must be truly symbolic / H. Hungar [and others]
- Automatic verification of the SCI cache coherence protocol / U. stern, D.L. Dill
- Describing and verifying synchronous circuits with the Boyer-Moore theorem prover / L. Pierre
- Problems encountered in the machine-assisted proof of hardware / P. Curzon
- Formally embedding existing high level synthesis algorithms / D. Eisenbiegler, R. Kumar
- Formal design of a class of computers / L.G. Wang, M. Mendler
- Symbolic analysis and verification of CPA descriptions / M.C. McFarland, T.J. Kowalski
- A foundation for formal reuse of hardware / A.C.V. de Melo, H. Barringer
- State enumeration with abstract descriptions of state machines / F. Corella [and others]
- Transforming boolean relations by symbolic encoding / G. Cabodi [and others]
- Design error diagnosis in sequential circuits / A. Wahba, D. Borrione
- Timing analysis of asynchronous circuits using timed automata / O. Maler, A. Pnueli
- Improved probabilistic verification by hash compaction / U. Stern, D.L. Dill
- Formal support for the ELLA hardware description language / H. Barringer, B. Monahan, A. Williams
- Verifying hardware components within JACK / R. De Nicola [and others]
- Language containment of non-deterministic [omega]-automata / S. Taşiran, R. Hojati, R.K. Brayton
- A partial-order approach to the verification of concurrent systems : checking liveness properties / D. Bolignano
- Semantics of a verification-oriented subset of VHDL / D. Déharbe, D. Borrione
- Reasoning about VHDL using operational and observational semantics / K.G.W. Gossens
- A symbolic relation for a subset of VHDL '87 descriptions and its application to symbolic model checking / E. Encrenaz
- Isbn
- 9783540455165
- Label
- Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings
- Title
- Correct Hardware Design and Verification Methods
- Title remainder
- IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings
- Statement of responsibility
- edited by Paolo E. Camurati, Hans Eveking
- Subject
-
- Computer-aided design
- Computer-aided design -- Congresses
- Conference papers and proceedings
- Conference papers and proceedings
- Data transmission systems
- Data transmission systems
- Data transmission systems
- Electrical & Computer Engineering
- Electrical Engineering
- Electronics
- Electronics
- Electronics
- Engineering
- Engineering
- Engineering
- Engineering & Applied Sciences
- Integrated circuits -- Verification
- Integrated circuits -- Verification
- Integrated circuits -- Verification -- Congresses
- Integrated circuits -- Very large scale integration | Design and construction | Data processing
- Integrated circuits -- Very large scale integration | Design and construction | Data processing
- Integrated circuits -- Very large scale integration | Design and construction | Data processing -- Congresses
- Logic design
- Logic design
- Logic design
- Software engineering
- Software engineering
- Software engineering
- Computer-aided design
- Language
- eng
- Summary
- This book constitutes the refereed proceedings of the IFIP WG10.5 Advanced Research Working Conference on Correct Hardware Design Methodologies, CHARME '95, held in Frankfurt, Germany, in October 1995. The 20 revised full papers presented were carefully selected by the program committee and address all current aspects of research and advanced applications in the field of formal verification of hardware. Among the topics covered are model checking, theorem proving, formally verified synthesis, process algebras, finite state systems, verification environments, language containment, and VHDL
- Cataloging source
- KIJ
- Dewey number
- 621.39/5
- Image bit depth
- 0
- Index
- no index present
- LC call number
- TK7874
- LC item number
- .A3353 1995
- Literary form
- non fiction
- http://bibfra.me/vocab/lite/meetingDate
- 1995
- http://bibfra.me/vocab/lite/meetingName
- Advanced Research Working Conference On Correct Hardware Design Methodologies
- Nature of contents
-
- dictionaries
- bibliography
- http://library.link/vocab/relatedWorkOrContributorName
-
- Camurati, Paolo
- Eveking, Hans
- Series statement
- Lecture Notes in Computer Science,
- Series volume
- 987
- http://library.link/vocab/subjectName
-
- Engineering
- Data transmission systems
- Software engineering
- Logic design
- Electronics
- Computer-aided design
- Integrated circuits
- Integrated circuits
- Computer-aided design
- Data transmission systems
- Electronics
- Engineering
- Integrated circuits
- Integrated circuits
- Logic design
- Software engineering
- Electrical Engineering
- Electrical & Computer Engineering
- Engineering & Applied Sciences
- Label
- Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking
- Antecedent source
- mixed
- Bibliography note
- Includes bibliographical references
- Carrier category
- online resource
- Carrier category code
-
- cr
- Carrier MARC source
- rdacarrier
- Color
- not applicable
- Content category
- text
- Content type code
-
- txt
- Content type MARC source
- rdacontent
- Contents
- What if model checking must be truly symbolic / H. Hungar [and others] -- Automatic verification of the SCI cache coherence protocol / U. stern, D.L. Dill -- Describing and verifying synchronous circuits with the Boyer-Moore theorem prover / L. Pierre -- Problems encountered in the machine-assisted proof of hardware / P. Curzon -- Formally embedding existing high level synthesis algorithms / D. Eisenbiegler, R. Kumar -- Formal design of a class of computers / L.G. Wang, M. Mendler -- Symbolic analysis and verification of CPA descriptions / M.C. McFarland, T.J. Kowalski -- A foundation for formal reuse of hardware / A.C.V. de Melo, H. Barringer -- State enumeration with abstract descriptions of state machines / F. Corella [and others] -- Transforming boolean relations by symbolic encoding / G. Cabodi [and others] -- Design error diagnosis in sequential circuits / A. Wahba, D. Borrione -- Timing analysis of asynchronous circuits using timed automata / O. Maler, A. Pnueli -- Improved probabilistic verification by hash compaction / U. Stern, D.L. Dill -- Formal support for the ELLA hardware description language / H. Barringer, B. Monahan, A. Williams -- Verifying hardware components within JACK / R. De Nicola [and others] -- Language containment of non-deterministic [omega]-automata / S. Taşiran, R. Hojati, R.K. Brayton -- A partial-order approach to the verification of concurrent systems : checking liveness properties / D. Bolignano -- Semantics of a verification-oriented subset of VHDL / D. Déharbe, D. Borrione -- Reasoning about VHDL using operational and observational semantics / K.G.W. Gossens -- A symbolic relation for a subset of VHDL '87 descriptions and its application to symbolic model checking / E. Encrenaz
- Control code
- 827358295
- Dimensions
- unknown
- Extent
- 1 online resource
- File format
- multiple file formats
- Form of item
- online
- Isbn
- 9783540455165
- Level of compression
- uncompressed
- Media category
- computer
- Media MARC source
- rdamedia
- Media type code
-
- c
- Other control number
- 10.1007/3-540-60385-9
- Other physical details
- volumes: digital.
- Quality assurance targets
- absent
- Reformatting quality
- access
- Specific material designation
- remote
- System control number
- (OCoLC)827358295
- Label
- Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking
- Antecedent source
- mixed
- Bibliography note
- Includes bibliographical references
- Carrier category
- online resource
- Carrier category code
-
- cr
- Carrier MARC source
- rdacarrier
- Color
- not applicable
- Content category
- text
- Content type code
-
- txt
- Content type MARC source
- rdacontent
- Contents
- What if model checking must be truly symbolic / H. Hungar [and others] -- Automatic verification of the SCI cache coherence protocol / U. stern, D.L. Dill -- Describing and verifying synchronous circuits with the Boyer-Moore theorem prover / L. Pierre -- Problems encountered in the machine-assisted proof of hardware / P. Curzon -- Formally embedding existing high level synthesis algorithms / D. Eisenbiegler, R. Kumar -- Formal design of a class of computers / L.G. Wang, M. Mendler -- Symbolic analysis and verification of CPA descriptions / M.C. McFarland, T.J. Kowalski -- A foundation for formal reuse of hardware / A.C.V. de Melo, H. Barringer -- State enumeration with abstract descriptions of state machines / F. Corella [and others] -- Transforming boolean relations by symbolic encoding / G. Cabodi [and others] -- Design error diagnosis in sequential circuits / A. Wahba, D. Borrione -- Timing analysis of asynchronous circuits using timed automata / O. Maler, A. Pnueli -- Improved probabilistic verification by hash compaction / U. Stern, D.L. Dill -- Formal support for the ELLA hardware description language / H. Barringer, B. Monahan, A. Williams -- Verifying hardware components within JACK / R. De Nicola [and others] -- Language containment of non-deterministic [omega]-automata / S. Taşiran, R. Hojati, R.K. Brayton -- A partial-order approach to the verification of concurrent systems : checking liveness properties / D. Bolignano -- Semantics of a verification-oriented subset of VHDL / D. Déharbe, D. Borrione -- Reasoning about VHDL using operational and observational semantics / K.G.W. Gossens -- A symbolic relation for a subset of VHDL '87 descriptions and its application to symbolic model checking / E. Encrenaz
- Control code
- 827358295
- Dimensions
- unknown
- Extent
- 1 online resource
- File format
- multiple file formats
- Form of item
- online
- Isbn
- 9783540455165
- Level of compression
- uncompressed
- Media category
- computer
- Media MARC source
- rdamedia
- Media type code
-
- c
- Other control number
- 10.1007/3-540-60385-9
- Other physical details
- volumes: digital.
- Quality assurance targets
- absent
- Reformatting quality
- access
- Specific material designation
- remote
- System control number
- (OCoLC)827358295
Subject
- Computer-aided design
- Computer-aided design -- Congresses
- Conference papers and proceedings
- Conference papers and proceedings
- Data transmission systems
- Data transmission systems
- Data transmission systems
- Electrical & Computer Engineering
- Electrical Engineering
- Electronics
- Electronics
- Electronics
- Engineering
- Engineering
- Engineering
- Engineering & Applied Sciences
- Integrated circuits -- Verification
- Integrated circuits -- Verification
- Integrated circuits -- Verification -- Congresses
- Integrated circuits -- Very large scale integration | Design and construction | Data processing
- Integrated circuits -- Very large scale integration | Design and construction | Data processing
- Integrated circuits -- Very large scale integration | Design and construction | Data processing -- Congresses
- Logic design
- Logic design
- Logic design
- Software engineering
- Software engineering
- Software engineering
- Computer-aided design
Genre
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<div class="citation" vocab="http://schema.org/"><i class="fa fa-external-link-square fa-fw"></i> Data from <span resource="http://link.library.missouri.edu/portal/Correct-Hardware-Design-and-Verification-Methods/NmjwP-pSHzo/" typeof="Book http://bibfra.me/vocab/lite/Item"><span property="name http://bibfra.me/vocab/lite/label"><a href="http://link.library.missouri.edu/portal/Correct-Hardware-Design-and-Verification-Methods/NmjwP-pSHzo/">Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking</a></span> - <span property="potentialAction" typeOf="OrganizeAction"><span property="agent" typeof="LibrarySystem http://library.link/vocab/LibrarySystem" resource="http://link.library.missouri.edu/"><span property="name http://bibfra.me/vocab/lite/label"><a property="url" href="http://link.library.missouri.edu/">University of Missouri Libraries</a></span></span></span></span></div>