Coverart for item
The Resource Cryptographic hardware and embedded systems-- CHES 2005 : 7th international workshop, Edinburgh, UK, August 29-September 1, 2005 : proceedings, Josyula R. Rao, Berk Sunar (eds.)

Cryptographic hardware and embedded systems-- CHES 2005 : 7th international workshop, Edinburgh, UK, August 29-September 1, 2005 : proceedings, Josyula R. Rao, Berk Sunar (eds.)

Label
Cryptographic hardware and embedded systems-- CHES 2005 : 7th international workshop, Edinburgh, UK, August 29-September 1, 2005 : proceedings
Title
Cryptographic hardware and embedded systems-- CHES 2005
Title remainder
7th international workshop, Edinburgh, UK, August 29-September 1, 2005 : proceedings
Statement of responsibility
Josyula R. Rao, Berk Sunar (eds.)
Title variation
CHES 2005
Creator
Contributor
Subject
Genre
Language
eng
Summary
"These are the proceedings of the 7th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2005) held in Edinburgh, Scotland from August 29 to September 1, 2005."
Member of
Cataloging source
GW5XE
Dewey number
005.8/2
Illustrations
illustrations
Index
index present
LC call number
TK7895.E42
LC item number
C4546 2005eb
Literary form
non fiction
http://bibfra.me/vocab/lite/meetingDate
2005
http://bibfra.me/vocab/lite/meetingName
CHES (Workshop)
Nature of contents
  • dictionaries
  • bibliography
http://library.link/vocab/relatedWorkOrContributorDate
1962-
http://library.link/vocab/relatedWorkOrContributorName
  • Rao, Josyula Ramachandra
  • Sunar, Berk
Series statement
Lecture notes in computer science,
Series volume
3659
http://library.link/vocab/subjectName
  • Embedded computer systems
  • Cryptography
  • Computer security
  • COMPUTERS
  • Informatique
  • Computer security
  • Cryptography
  • Embedded computer systems
  • Système imbriqué (Informatique)
  • Cryptographie (Informatique)
  • Appareil cryptographique
Label
Cryptographic hardware and embedded systems-- CHES 2005 : 7th international workshop, Edinburgh, UK, August 29-September 1, 2005 : proceedings, Josyula R. Rao, Berk Sunar (eds.)
Instantiates
Publication
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
  • cr
Carrier MARC source
rdacarrier
Color
multicolored
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
Side Channels I -- Resistance of Randomized Projective Coordinates Against Power Analysis -- Templates as Master Keys -- A Stochastic Model for Differential Side Channel Cryptanalysis -- Arithmetic for Cryptanalysis -- A New Baby-Step Giant-Step Algorithm and Some Applications to Cryptanalysis -- Further Hidden Markov Model Cryptanalysis -- Low Resources -- Energy-Efficient Software Implementation of Long Integer Modular Arithmetic -- Short Memory Scalar Multiplication on Koblitz Curves -- Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051?P -- Special Purpose Hardware -- SHARK: A Realizable Special Hardware Sieving Device for Factoring 1024-Bit Integers -- Scalable Hardware for Sparse Systems of Linear Equations, with Applications to Integer Factorization -- Design of Testable Random Bit Generators -- Hardware Attacks and Countermeasures I -- Successfully Attacking Masked AES Hardware Implementations -- Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints -- Masking at Gate Level in the Presence of Glitches -- Arithmetic for Cryptography -- Bipartite Modular Multiplication -- Fast Truncated Multiplication for Cryptographic Applications -- Using an RSA Accelerator for Modular Inversion -- Comparison of Bit and Word Level Algorithms for Evaluating Unstructured Functions over Finite Rings -- Side Channel II (EM) -- EM Analysis of Rijndael and ECC on a Wireless Java-Based PDA -- Security Limits for Compromising Emanations -- Security Evaluation Against Electromagnetic Analysis at Design Time -- Side Channel III -- On Second-Order Differential Power Analysis -- Improved Higher-Order Side-Channel Attacks with FPGA Experiments -- Trusted Computing -- Secure Data Management in Trusted Computing -- Hardware Attacks and Countermeasures II -- Data Remanence in Flash Memory Devices -- Prototype IC with WDDL and Differential Routing -- DPA Resistance Assessment -- Hardware Attacks and Countermeasures III -- DPA Leakage Models for CMOS Logic Circuits -- The "Backend Duplication" Method -- Efficient Hardware I -- Hardware Acceleration of the Tate Pairing in Characteristic Three -- Efficient Hardware for the Tate Pairing Calculation in Characteristic Three -- Efficient Hardware II -- AES on FPGA from the Fastest to the Smallest -- A Very Compact S-Box for AES
Control code
262681824
Dimensions
unknown
Extent
1 online resource (xiv, 458 pages)
Form of item
online
Isbn
9783540319405
Media category
computer
Media MARC source
rdamedia
Media type code
  • c
Other control number
10.1007/11545262
Other physical details
illustrations.
http://library.link/vocab/ext/overdrive/overdriveId
978-3-540-28474-1
Specific material designation
remote
System control number
(OCoLC)262681824
Label
Cryptographic hardware and embedded systems-- CHES 2005 : 7th international workshop, Edinburgh, UK, August 29-September 1, 2005 : proceedings, Josyula R. Rao, Berk Sunar (eds.)
Publication
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
  • cr
Carrier MARC source
rdacarrier
Color
multicolored
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
Side Channels I -- Resistance of Randomized Projective Coordinates Against Power Analysis -- Templates as Master Keys -- A Stochastic Model for Differential Side Channel Cryptanalysis -- Arithmetic for Cryptanalysis -- A New Baby-Step Giant-Step Algorithm and Some Applications to Cryptanalysis -- Further Hidden Markov Model Cryptanalysis -- Low Resources -- Energy-Efficient Software Implementation of Long Integer Modular Arithmetic -- Short Memory Scalar Multiplication on Koblitz Curves -- Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051?P -- Special Purpose Hardware -- SHARK: A Realizable Special Hardware Sieving Device for Factoring 1024-Bit Integers -- Scalable Hardware for Sparse Systems of Linear Equations, with Applications to Integer Factorization -- Design of Testable Random Bit Generators -- Hardware Attacks and Countermeasures I -- Successfully Attacking Masked AES Hardware Implementations -- Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints -- Masking at Gate Level in the Presence of Glitches -- Arithmetic for Cryptography -- Bipartite Modular Multiplication -- Fast Truncated Multiplication for Cryptographic Applications -- Using an RSA Accelerator for Modular Inversion -- Comparison of Bit and Word Level Algorithms for Evaluating Unstructured Functions over Finite Rings -- Side Channel II (EM) -- EM Analysis of Rijndael and ECC on a Wireless Java-Based PDA -- Security Limits for Compromising Emanations -- Security Evaluation Against Electromagnetic Analysis at Design Time -- Side Channel III -- On Second-Order Differential Power Analysis -- Improved Higher-Order Side-Channel Attacks with FPGA Experiments -- Trusted Computing -- Secure Data Management in Trusted Computing -- Hardware Attacks and Countermeasures II -- Data Remanence in Flash Memory Devices -- Prototype IC with WDDL and Differential Routing -- DPA Resistance Assessment -- Hardware Attacks and Countermeasures III -- DPA Leakage Models for CMOS Logic Circuits -- The "Backend Duplication" Method -- Efficient Hardware I -- Hardware Acceleration of the Tate Pairing in Characteristic Three -- Efficient Hardware for the Tate Pairing Calculation in Characteristic Three -- Efficient Hardware II -- AES on FPGA from the Fastest to the Smallest -- A Very Compact S-Box for AES
Control code
262681824
Dimensions
unknown
Extent
1 online resource (xiv, 458 pages)
Form of item
online
Isbn
9783540319405
Media category
computer
Media MARC source
rdamedia
Media type code
  • c
Other control number
10.1007/11545262
Other physical details
illustrations.
http://library.link/vocab/ext/overdrive/overdriveId
978-3-540-28474-1
Specific material designation
remote
System control number
(OCoLC)262681824

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