The Resource Formal methods in computer-aided design : 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004 ; proceedings, Alan J. Hu, Andrew K. Martin (eds.)
Formal methods in computer-aided design : 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004 ; proceedings, Alan J. Hu, Andrew K. Martin (eds.)
Resource Information
The item Formal methods in computer-aided design : 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004 ; proceedings, Alan J. Hu, Andrew K. Martin (eds.) represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in University of Missouri Libraries.This item is available to borrow from 1 library branch.
Resource Information
The item Formal methods in computer-aided design : 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004 ; proceedings, Alan J. Hu, Andrew K. Martin (eds.) represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in University of Missouri Libraries.
This item is available to borrow from 1 library branch.
- Summary
- This book constitutes the refereed proceedings of the 5th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2004, held in Austin, Texas, USA in November 2004. The 29 revised full papers presented together with the abstract of an invited talk were carefully reviewed and selected from 69 submissions. The papers address all current issues on tools, methods, algorithms, and foundational theory for the application of formalized reasoning to all aspects of computer-aided systems design, including specification, verification, synthesis, and testing
- Language
- eng
- Extent
- 1 online resource (xi, 444 pages)
- Contents
-
- Challenges in System-Level Design
- Generating Fast Multipliers Using Clever Circuits
- Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques
- A Methodology for the Formal Verification of FFT Algorithms in HOL
- A Functional Approach to the Formal Specification of Networks on Chip
- Proof Styles in Operational Semantics
- Integrating Reasoning About Ordinal Arithmetic into ACL2
- Combining Equivalence Verification and Completion Functions
- Synchronization-at-Retirement for Pipeline Verification
- Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs
- Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders
- Scalable Automated Verification via Expert-System Guided Transformations
- Simple Yet Efficient Improvements of SAT Based Bounded Model Checking
- Simple Bounded LTL Model Checking
- QuBE++: An Efficient QBF Solver
- Bounded Probabilistic Model Checking with the Mur? Verifier
- Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States
- Bounded Verification of Past LTL
- A Hybrid of Counterexample-Based and Proof-Based Abstraction
- Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis
- Approximate Symbolic Model Checking for Incomplete Designs
- Extending Extended Vacuity
- Parameterized Vacuity
- An Operational Semantics for Weak PSL
- Accepting Predecessors Are Better than Back Edges in Distributed LTL Model-Checking
- Bloom Filters in Probabilistic Verification
- A Simple Method for Parameterized Verification of Cache Coherence Protocols
- A Partitioning Methodology for BDD-Based Verification
- Invariant Checking Combining Forward and Backward Traversal
- Variable Reuse for Efficient Image Computation
- Isbn
- 9783540304944
- Label
- Formal methods in computer-aided design : 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004 ; proceedings
- Title
- Formal methods in computer-aided design
- Title remainder
- 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004 ; proceedings
- Statement of responsibility
- Alan J. Hu, Andrew K. Martin (eds.)
- Title variation
- FMCAD 2004
- Subject
-
- Conference papers and proceedings
- Conference papers and proceedings
- Digital integrated circuits -- Computer-aided design
- Digital integrated circuits -- Computer-aided design
- Digital integrated circuits -- Computer-aided design -- Congresses
- Digital integrated circuits -- Design and construction | Mathematics -- Congresses
- Formal methods (Computer science)
- Formal methods (Computer science)
- Formal methods (Computer science) -- Congresses
- Integrated circuits -- Verification
- Integrated circuits -- Verification
- Integrated circuits -- Verification -- Congresses
- TECHNOLOGY & ENGINEERING -- Electronics | Circuits | Logic
- TECHNOLOGY & ENGINEERING -- Electronics | Circuits | VLSI & ULSI
- COMPUTERS -- Logic Design
- Language
- eng
- Summary
- This book constitutes the refereed proceedings of the 5th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2004, held in Austin, Texas, USA in November 2004. The 29 revised full papers presented together with the abstract of an invited talk were carefully reviewed and selected from 69 submissions. The papers address all current issues on tools, methods, algorithms, and foundational theory for the application of formalized reasoning to all aspects of computer-aided systems design, including specification, verification, synthesis, and testing
- Cataloging source
- N$T
- Dewey number
- 621.39/5
- Illustrations
- illustrations
- Index
- index present
- LC call number
- TK7874.65
- LC item number
- .F53 2004eb
- Literary form
- non fiction
- http://bibfra.me/vocab/lite/meetingDate
- 2004
- http://bibfra.me/vocab/lite/meetingName
- FMCAD 2004
- Nature of contents
-
- dictionaries
- bibliography
- http://library.link/vocab/relatedWorkOrContributorName
-
- Hu, Alan J.
- Martin, Andrew K
- Series statement
- Lecture notes in computer science,
- Series volume
- 3312
- http://library.link/vocab/subjectName
-
- Digital integrated circuits
- Integrated circuits
- Formal methods (Computer science)
- Digital integrated circuits
- TECHNOLOGY & ENGINEERING
- TECHNOLOGY & ENGINEERING
- COMPUTERS
- Digital integrated circuits
- Formal methods (Computer science)
- Integrated circuits
- Label
- Formal methods in computer-aided design : 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004 ; proceedings, Alan J. Hu, Andrew K. Martin (eds.)
- Antecedent source
- unknown
- Bibliography note
- Includes bibliographical references and index
- Carrier category
- online resource
- Carrier category code
-
- cr
- Carrier MARC source
- rdacarrier
- Color
- multicolored
- Content category
- text
- Content type code
-
- txt
- Content type MARC source
- rdacontent
- Contents
- Challenges in System-Level Design -- Generating Fast Multipliers Using Clever Circuits -- Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques -- A Methodology for the Formal Verification of FFT Algorithms in HOL -- A Functional Approach to the Formal Specification of Networks on Chip -- Proof Styles in Operational Semantics -- Integrating Reasoning About Ordinal Arithmetic into ACL2 -- Combining Equivalence Verification and Completion Functions -- Synchronization-at-Retirement for Pipeline Verification -- Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs -- Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders -- Scalable Automated Verification via Expert-System Guided Transformations -- Simple Yet Efficient Improvements of SAT Based Bounded Model Checking -- Simple Bounded LTL Model Checking -- QuBE++: An Efficient QBF Solver -- Bounded Probabilistic Model Checking with the Mur? Verifier -- Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States -- Bounded Verification of Past LTL -- A Hybrid of Counterexample-Based and Proof-Based Abstraction -- Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis -- Approximate Symbolic Model Checking for Incomplete Designs -- Extending Extended Vacuity -- Parameterized Vacuity -- An Operational Semantics for Weak PSL -- Accepting Predecessors Are Better than Back Edges in Distributed LTL Model-Checking -- Bloom Filters in Probabilistic Verification -- A Simple Method for Parameterized Verification of Cache Coherence Protocols -- A Partitioning Methodology for BDD-Based Verification -- Invariant Checking Combining Forward and Backward Traversal -- Variable Reuse for Efficient Image Computation
- Control code
- 62417235
- Dimensions
- unknown
- Extent
- 1 online resource (xi, 444 pages)
- File format
- unknown
- Form of item
- online
- Isbn
- 9783540304944
- Level of compression
- unknown
- Media category
- computer
- Media MARC source
- rdamedia
- Media type code
-
- c
- Other control number
- 10.1007/b102264
- Other physical details
- illustrations.
- Quality assurance targets
- not applicable
- Reformatting quality
- unknown
- Sound
- unknown sound
- Specific material designation
- remote
- System control number
- (OCoLC)62417235
- Label
- Formal methods in computer-aided design : 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004 ; proceedings, Alan J. Hu, Andrew K. Martin (eds.)
- Antecedent source
- unknown
- Bibliography note
- Includes bibliographical references and index
- Carrier category
- online resource
- Carrier category code
-
- cr
- Carrier MARC source
- rdacarrier
- Color
- multicolored
- Content category
- text
- Content type code
-
- txt
- Content type MARC source
- rdacontent
- Contents
- Challenges in System-Level Design -- Generating Fast Multipliers Using Clever Circuits -- Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques -- A Methodology for the Formal Verification of FFT Algorithms in HOL -- A Functional Approach to the Formal Specification of Networks on Chip -- Proof Styles in Operational Semantics -- Integrating Reasoning About Ordinal Arithmetic into ACL2 -- Combining Equivalence Verification and Completion Functions -- Synchronization-at-Retirement for Pipeline Verification -- Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs -- Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders -- Scalable Automated Verification via Expert-System Guided Transformations -- Simple Yet Efficient Improvements of SAT Based Bounded Model Checking -- Simple Bounded LTL Model Checking -- QuBE++: An Efficient QBF Solver -- Bounded Probabilistic Model Checking with the Mur? Verifier -- Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States -- Bounded Verification of Past LTL -- A Hybrid of Counterexample-Based and Proof-Based Abstraction -- Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis -- Approximate Symbolic Model Checking for Incomplete Designs -- Extending Extended Vacuity -- Parameterized Vacuity -- An Operational Semantics for Weak PSL -- Accepting Predecessors Are Better than Back Edges in Distributed LTL Model-Checking -- Bloom Filters in Probabilistic Verification -- A Simple Method for Parameterized Verification of Cache Coherence Protocols -- A Partitioning Methodology for BDD-Based Verification -- Invariant Checking Combining Forward and Backward Traversal -- Variable Reuse for Efficient Image Computation
- Control code
- 62417235
- Dimensions
- unknown
- Extent
- 1 online resource (xi, 444 pages)
- File format
- unknown
- Form of item
- online
- Isbn
- 9783540304944
- Level of compression
- unknown
- Media category
- computer
- Media MARC source
- rdamedia
- Media type code
-
- c
- Other control number
- 10.1007/b102264
- Other physical details
- illustrations.
- Quality assurance targets
- not applicable
- Reformatting quality
- unknown
- Sound
- unknown sound
- Specific material designation
- remote
- System control number
- (OCoLC)62417235
Subject
- Conference papers and proceedings
- Conference papers and proceedings
- Digital integrated circuits -- Computer-aided design
- Digital integrated circuits -- Computer-aided design
- Digital integrated circuits -- Computer-aided design -- Congresses
- Digital integrated circuits -- Design and construction | Mathematics -- Congresses
- Formal methods (Computer science)
- Formal methods (Computer science)
- Formal methods (Computer science) -- Congresses
- Integrated circuits -- Verification
- Integrated circuits -- Verification
- Integrated circuits -- Verification -- Congresses
- TECHNOLOGY & ENGINEERING -- Electronics | Circuits | Logic
- TECHNOLOGY & ENGINEERING -- Electronics | Circuits | VLSI & ULSI
- COMPUTERS -- Logic Design
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<div class="citation" vocab="http://schema.org/"><i class="fa fa-external-link-square fa-fw"></i> Data from <span resource="http://link.library.missouri.edu/portal/Formal-methods-in-computer-aided-design--5th/EpSK0vZPZwc/" typeof="Book http://bibfra.me/vocab/lite/Item"><span property="name http://bibfra.me/vocab/lite/label"><a href="http://link.library.missouri.edu/portal/Formal-methods-in-computer-aided-design--5th/EpSK0vZPZwc/">Formal methods in computer-aided design : 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004 ; proceedings, Alan J. Hu, Andrew K. Martin (eds.)</a></span> - <span property="potentialAction" typeOf="OrganizeAction"><span property="agent" typeof="LibrarySystem http://library.link/vocab/LibrarySystem" resource="http://link.library.missouri.edu/"><span property="name http://bibfra.me/vocab/lite/label"><a property="url" href="http://link.library.missouri.edu/">University of Missouri Libraries</a></span></span></span></span></div>
