Coverart for item
The Resource Transactions on high-performance embedded architectures and compilers II, Per Stenström (ed.), (electronic resource)

Transactions on high-performance embedded architectures and compilers II, Per Stenström (ed.), (electronic resource)

Label
Transactions on high-performance embedded architectures and compilers II
Title
Transactions on high-performance embedded architectures and compilers II
Statement of responsibility
Per Stenström (ed.)
Contributor
Subject
Language
eng
Summary
  • Annotation:
  • Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This second issue contains 15 papers carefully reviewed and selected out of 31 submissions and is divided into two sections. The first section contains extended versions of the top five papers from the 2nd International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2007) held in Ghent, Belgium, in January 2007. The second section consists of ten papers covering topics such as microarchitecture, memory systems, code generation, and performance modeling
Member of
Cataloging source
CaPaEBR
LC call number
TK7895.E42
LC item number
T73 2009eb
http://library.link/vocab/relatedWorkOrContributorName
  • Stenström, Per
  • ebrary, Inc
Series statement
Lecture notes in computer science
Series volume
5470
http://library.link/vocab/subjectName
  • Embedded computer systems
  • Compilers (Computer programs)
  • Computer architecture
Summary expansion
Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems.This second issue contains 15 papers carefully reviewed and selected out of 31 submissions and is divided into two sections. The first section contains extended versions of the top five papers from the 2nd International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2007) held in Ghent, Belgium, in January 2007. The second section consists of ten papers covering topics such as microarchitecture, memory systems, code generation, and performance modeling
Label
Transactions on high-performance embedded architectures and compilers II, Per Stenström (ed.), (electronic resource)
Instantiates
Publication
Note
Includes index
Control code
OCM1bookssj0000320475
Dimensions
unknown
Isbn
9783642009037
Specific material designation
remote
System control number
(WaSeSS)bookssj0000320475
Label
Transactions on high-performance embedded architectures and compilers II, Per Stenström (ed.), (electronic resource)
Publication
Note
Includes index
Control code
OCM1bookssj0000320475
Dimensions
unknown
Isbn
9783642009037
Specific material designation
remote
System control number
(WaSeSS)bookssj0000320475

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