Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking

Resource Information

The instance Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking represents a material embodiment of a distinct intellectual or artistic creation found in University of Missouri Libraries. This resource is a combination of several types including: Instance, Electronic.

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Label

Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings, edited by Paolo E. Camurati, Hans Eveking

Title remainder

IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings

Statement of responsibility

edited by Paolo E. Camurati, Hans Eveking

Instantiates

• Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings

Publication

• Berlin, Heidelberg, Springer-Verlag, 1995

Antecedent source

mixed

Bibliography note

Includes bibliographical references

Carrier category

online resource

Carrier category code

• cr

Carrier MARC source

rdacarrier

Color

not applicable

Content category

text

Content type code

• txt

Content type MARC source

rdacontent

Contents

What if model checking must be truly symbolic / H. Hungar [and others] -- Automatic verification of the SCI cache coherence protocol / U. stern, D.L. Dill -- Describing and verifying synchronous circuits with the Boyer-Moore theorem prover / L. Pierre -- Problems encountered in the machine-assisted proof of hardware / P. Curzon -- Formally embedding existing high level synthesis algorithms / D. Eisenbiegler, R. Kumar -- Formal design of a class of computers / L.G. Wang, M. Mendler -- Symbolic analysis and verification of CPA descriptions / M.C. McFarland, T.J. Kowalski -- A foundation for formal reuse of hardware / A.C.V. de Melo, H. Barringer -- State enumeration with abstract descriptions of state machines / F. Corella [and others] -- Transforming boolean relations by symbolic encoding / G. Cabodi [and others] -- Design error diagnosis in sequential circuits / A. Wahba, D. Borrione -- Timing analysis of asynchronous circuits using timed automata / O. Maler, A. Pnueli -- Improved probabilistic verification by hash compaction / U. Stern, D.L. Dill -- Formal support for the ELLA hardware description language / H. Barringer, B. Monahan, A. Williams -- Verifying hardware components within JACK / R. De Nicola [and others] -- Language containment of non-deterministic [omega]-automata / S. Taşiran, R. Hojati, R.K. Brayton -- A partial-order approach to the verification of concurrent systems : checking liveness properties / D. Bolignano -- Semantics of a verification-oriented subset of VHDL / D. Déharbe, D. Borrione -- Reasoning about VHDL using operational and observational semantics / K.G.W. Gossens -- A symbolic relation for a subset of VHDL '87 descriptions and its application to symbolic model checking / E. Encrenaz

Control code

827358295

Dimensions

unknown

Extent

1 online resource

File format

multiple file formats

Form of item

online

Isbn

9783540455165

Level of compression

uncompressed

Media category

computer

Media MARC source

rdamedia

Media type code

• c

Other control number

10.1007/3-540-60385-9

Other physical details

volumes: digital.

Quality assurance targets

absent

Record ID

.b130112045

Reformatting quality

access

Specific material designation

remote

System control number

(OCoLC)827358295