Testing for small-delay defects in nanoscale CMOS integrated circuits

Resource Information

The work Testing for small-delay defects in nanoscale CMOS integrated circuits represents a distinct intellectual or artistic creation found in University of Missouri Libraries. This resource is a combination of several types including: Work, Language Material, Books.

Label

Testing for small-delay defects in nanoscale CMOS integrated circuits

Statement of responsibility

edited by Sandeep K. Goel, Krishnendu Chakrabarty

Contributor

• Goel, Sandeep K.
• Chakrabarty, Krishnendu

Editor

• Chakrabarty, Krishnendu
• Goel, Sandeep K.

Subject

• Electronic books
• Metal oxide semiconductors, Complementary -- Testing
• Metal oxide semiconductors, Complementary -- Testing
• TECHNOLOGY & ENGINEERING -- Mechanical

Genre

• Electronic books

Language

eng

Summary

Advances in design methods and process technologies have resulted in a continuous increase in the complexity of integrated circuits (ICs). However, the increased complexity and nanometer-size features of modern ICs make them susceptible to manufacturing defects, as well as performance and quality issues. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits covers common problems in areas such as process variations, power supply noise, crosstalk, resistive opens/bridges, and design-for-manufacturing (DfM)-related rule violations. The book also addresses testing for small-delay

Member of

• O'Reilly Safari Learning Platform: Academic edition
• Devices, circuits, and systems

Cataloging source

CUS

Dewey number

621.39/732

Illustrations

illustrations

Index

index present

LC call number

TK7871.99.M44

LC item number

T43 2014eb

Literary form

non fiction

Nature of contents

• dictionaries
• bibliography

Series statement

Devices, circuits, and systems